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AP7217
500mA CMOS LDO
Features
* * * * * * * * * Very Low Dropout Voltage Low Current Consumption: Typ. 50A Output Voltage: 3.3V Guaranteed 500mA (min) Output Input Range up to 5.5V Current Limiting Stable with either electrolytic capacitor or low-ESR MLCC (multi-layer ceramic capacitor) Low Temperature Coefficient SOP-8L: Available in "Green" Molding Compound (no Br, Sb) Lead Free Finish / RoHS Compliant (Note 1)
General Description
The AP7217 low-dropout linear regulator operates from a 3.3V to 5.5V supply and delivers a guaranteed 500mA (min) continuous load current. The high-accuracy output voltage is preset to an internally trimmed voltage. An active-low open-drain reset output remains asserted for at least 20ms (TYP) after output voltage reaches VDF. The space-saving SOP-8L package is suitable for "pocket" and hand-held applications.
Applications
* * * * HD/BlueRay DVD & MP3/4 Players Mobile Handsets and Smartphones Digital Still Camera Hand-Held Computers
Ordering Information
AP 7217 - XX X X X
Output voltage
33 : 3.3V
Package
S : SOP-8L
Lead free
G : Green
Packing
-U : Tube -13 : Tape & Reel
Note:
1. RoHS revision 13.2.2003. Glass and High Temperature Solder Exemptions Applied, see EU Directive Annex Notes 5 and 7.
Device AP7217-XXS
Note:
Package Code S
Packaging (Note 2) SOP-8L
Tube Part Number Quantity Suffix 100 -U
13" Tape and Reel Part Number Quantity Suffix 2500/Tape & Reel -13
2. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be on our website at http://www.diodes.com/datasheets/ap02001.pdf.
AP7217 Rev. 1
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(c) Diodes Incorporated
AP7217
500mA CMOS LDO
Pin Assignments
( Top View ) NC 1 VROUT 2 AP7217 NC 3 VIN 4 6 VD OUT 5 NC 8 EN 7 GND
Pin Descriptions
Pin Name NC VROUT NC VIN NC VDOUT GND EN Pin No. 1 2 3 4 5 6 7 8 Function No Connection Voltage Output No Connection Supply Voltage No connection VD Output (Reset on I/P) Ground Enable (VR On/Off)
SOP-8L
Block Diagram
EN On Off Bandgap 1.2V VDOUT Enable VIN
ERROR AMP
+
Current Limit VROUT R1
+ VD Comp.
R3 R2 R4
GND
Absolute Maximum Ratings
Symbol ESD HBM ESD MM VIN IOUT VROUT TJ TJ(MAX) PD Parameter Human Body Model ESD Protection Machine Model ESD Protection Input Voltage Output Current Output Voltage Operating Junction Temperature Range Maximum Junction Temperature Internal Power Dissipation Rating 2 450 +6 PD/ (VIN-VO) GND - 0.3 ~ VIN+ 0.3 -40 to +125 150 1.2 Unit KV V V mA V C C W
AP7217 Rev. 1
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AP7217
500mA CMOS LDO
Recommended Operating Conditions
Symbol VIN IOUT TA Parameter Input Voltage Output Current Operating Ambient Temperature Min 3.3 0 -40 Max 5.5 500 85 Unit V mA C
Electrical Characteristics
(TA = 25C, CIN = 1F, COUT = 1F, VEN = 2V, unless otherwise noted) Symbol Parameter Test Conditions IQ Quiescent Current IO = 0mA VEN = Off ISTB Standby Current VIN = 5.0V Output Voltage IO = 30mA, VIN = 5V Accuracy VROUT VROUT Temperature -40C to 85C, IOUT = 30mA Coefficient VDROPOUT IOUT ILIMIT Ishort VLINE/VIN/VROUT VROUT PSRR VEH VEL IEN
VDF
Min -
Typ. 50 15
Max 70 30 3.366
Unit A A V ppm / oC
3.234
3.300 100 100
Dropout Voltage Output Current Current Limit Short Circuit Current Line Regulation Load Regulation Power Supply Rejection EN Input Threshold Enable Pin Current Detect fall voltage
VD Hysteresis Range
IOUT = 100mA VIN = 5.3V VIN = 5.3V VIN = 5.3V 4.3V VIN 5.5V; IOUT = 30mA 1mA IOUT 100mA, VIN = 5.3V VIN = 4.3V+0.5Vp-pAC, IOUT = 50mA Output ON Output OFF F= 1KHz 1.6 -0.1 3.83 VDF x1.02 VDOUT = 0.5V VIN = 2.0V 3.0V VIN = 1.8V to VDF+1V SOP-8L (Note 3) SOP-8L (Note 3) 500
250
mV mA mA mA %/V mV dB
600 50 0.01 15 55
0.2 50
VHysteresis IVDOUT tRP JA JC
Note:
3.91 VDF x1.05 20 30 20 134 28
0.25 0.1 3.98 VDF x1.08
V V A V V mA
VD Supply Current VDOUT Delay Time Thermal Resistance Thermal Resistance
10
40
mSec C/W C/W
3. Test conditions for SOP-8L: Devices mounted on FR-4 PC board, MRP, 2oz copper layout, calibrate at TJ=150 C, measure at TA=25C, minimum recommended pad layout
AP7217 Rev. 1
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(c) Diodes Incorporated
AP7217
500mA CMOS LDO
Typical Application
U1 VIN VROUT
VIN
100K CIN 1uF VDOUT
4
2
VROUT
ON
AP7217
6 VDOUT GND 7 EN 8
OFF COUT 1uF
Typical Performance Characteristics
Vcc vs. Quiescent current
100 90 80
Iout vs. Dropout voltage
1000 900 800
Dropout (mV)
70
700 600 500 400 300 200 100 0
Iccq (uA)
60 50 40 30 20 10 0 3.6 4 4.3 5 5.5
30
100
300
500
Vcc (V)
Iout (mA)
Vcc vs. Standby current
70 60 50 40 30 20 10 0
Delay time vs. Temperature
24 23 22
Delay time (mS)
21 20 19 18 17 16 15 -40 25 85 100
I-standby (uA)
3.6
4
4.3
5
5.5
Temperature(o C)
Vcc (V)
AP7217 Rev. 1
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AP7217
500mA CMOS LDO
Typical Performance Characteristics
Load Transient Response (VIN=4.3V, IOUT=0~500mA)
(Continued)
Load Transient Response (VIN=5.5V, IOUT=0~500mA) VIN
VIN VROUT IOUT VROUT IOUT
Load Transient Response (VIN=4.3V, IOUT=100~300mA) VIN VIN VROUT VROUT
Load Transient Response (VIN=5.5V, IOUT=100~300mA)
IOUT
IOUT
AP7217 Rev. 1
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AP7217
500mA CMOS LDO
Timing Diagram
tRP
20mSec-TYP.
1.8V
VIN VDOUT EN VROUT
Application Note
Input Capacitor A 1F ceramic capacitor is recommended to connect between IN and GND pins to decouple input power supply glitch and noise. The amount of the capacitance may be increased without limit. A lower ESR (Equivalent Series Resistance) capacitor allows the use of less capacitance, while higher ESR type requires more capacitance. This input capacitor must be located as close as possible to the device to assure input stability and less noise. For PCB layout, a wide copper trace is required for both IN and GND. Output Capacitor The output capacitor is required to stabilize and help the transient response of the LDO. The AP7217 is designed to have excellent transient response for most applications with a small amount of output capacitance. The AP7217 is stable with any small ceramic output capacitors of 1.0F or higher value, and the temperature coefficients of X7R or X5R type. Additional capacitance helps to reduce undershoot and overshoot during transient. For PCB layout, the output capacitor must be placed as close as possible to OUT and GND pins, and keep the leads as short as possible. ENABLE/SHUTDOWN Operation The AP7217 is turned on by setting the EN pin high, and is turned off by pulling it low. If this feature is not used, the EN pin should be tied to IN pin to keep the regulator output on at all time. To ensure proper operation, the signal source used to drive the EN pin must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH.
EN=0 EN=1
VROUT 0V 3.3V
VDOUT
Current Limit Protection When output current at OUT pin is higher than current limit threshold, the current limit protection will be triggered and clamp the output current to approximately 600mA to prevent over-current and to protect the regulator from damage due to overheating. Short circuit protection When VRout pin is shorted to GND or VRout voltage is less than 200mV, short circuit protection will be triggered and clamp the output current to approximately 50mA. VDOUT (reset output) ---Open-Drain Active-Low reset output--In general, VDOUT is pulled up by a resistor (100Kohm) to VIN. The AP7217 microprocess (uP) supervisory circuitry asserts a guaranteed logic-low reset during power-up and power-down. Reset is asserted asserts when VIN is below the reset threshold and remain asserted for at least tRP after VIN rises above the reset threshold. As long as VIN is lower than the reset threshold, VDOUT remains at logic "0". When VIN become higher than VTH, a logic "1" is asserted after a time delay defined by tRP.
AP7217 Rev. 1
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AP7217
500mA CMOS LDO
Marking Information
( Top View )
8
Logo Part No.
5
7217-33 YY WW X X
G : Green Internal code Xth week : 01~52 Year : "07" = 2007 "08" = 2008
1 SOP-8L
4
~
Package Information
Package type: SOP-8L
(unit: mm)
3.70/4.10
5.79/6.20
0.08/0.25
0.254 0.38/1.27
Gauge Plane Seating Plane
Detail "A"
7~9 1.30/1.50 1.75max. 0.20typ
0.35max. 45
7~9
Detail "A"
3.70/4.10
1.27typ 4.80/5.30
0.3/0.5
0.78
8x-0.60 5.4 6x-1.27 8x-1.55
Land Pattern Recommendation (Unit: mm)
IMPORTANT NOTICE Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to any product herein. Diodes Incorporated does not assume any liability arising out of the application or use of any product described herein; neither does it convey any license under its patent rights, nor the rights of others. The user of products in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on our website, harmless against all damages. LIFE SUPPORT Diodes Incorporated products are not authorized for use as critical components in life support devices or systems without the expressed written approval of the President of Diodes Incorporated.
AP7217 Rev. 1
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(c) Diodes Incorporated

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